NVIDIA and MediaTek announced on August 31, 2026, that they are expanding their collaboration across AI infrastructure, local AI computing and automotive systems. The most significant new element is MediaTek’s planned adoption of NVIDIA’s NVLink Fusion platform to help customers build custom AI accelerators that connect to NVIDIA-based rack-scale systems.

NVIDIA also announced that it had invested $3.5 billion in convertible bonds issued by MediaTek. The announcement does not disclose the bonds’ conversion terms or explain how the investment affects ownership, governance or the commercial structure of the partnership.

This is a collaboration announcement rather than a finished-product launch. No customer, completed custom accelerator, benchmark, price, commercial availability date or manufacturing schedule was identified.

Contents

What changed

NVIDIA and MediaTek already describe their work as spanning local computing and automotive platforms. The expanded arrangement adds a role for MediaTek in NVIDIA’s NVLink Fusion ecosystem for custom AI infrastructure.

Under the announced plan, hyperscalers, cloud service providers and developers of frontier AI models would be able to work with MediaTek on custom XPUs. “XPU” is a broad term for a processor or accelerator designed for a particular workload; here, it refers to customer-specific accelerators for AI infrastructure.

NVIDIA says NVLink Fusion is intended to provide a prevalidated route for connecting those custom XPUs to NVIDIA NVLink-enabled, rack-scale AI systems and its MGX rack-scale architecture. The companies describe MediaTek as helping customers develop infrastructure that combines their own accelerator designs with the surrounding connectivity, memory, packaging and system integration.

The proposed arrangement therefore covers more than the design of an accelerator die. It brings together:

  • the custom XPU;
  • high-speed die-to-die and system connectivity;
  • memory architecture;
  • advanced packaging;
  • power and performance characteristics; and
  • integration into rack-scale AI infrastructure.

NVIDIA describes NVLink Fusion as including an NVLink Fusion chiplet, NVLink-C2C connectivity and NVHBM for customised memory capabilities. A chiplet is a separately designed silicon component used within a larger multi-die package. This approach can combine different functions or manufacturing technologies in one package, but it also depends on high-speed interconnects and advanced packaging.

The announcement says customers will be able to bring XPU designs to MediaTek and tailor connectivity, memory, packaging, performance and power characteristics to their workloads and infrastructure requirements. It does not provide interface bandwidth, latency, power figures, process-node details or packaging specifications.

AI infrastructure is not determined by accelerator compute alone. Large AI models repeatedly move substantial quantities of model parameters and data between processors and memory, making memory bandwidth and the links between components important parts of system design.

A system may also need to connect multiple accelerators within one tightly integrated platform and then connect several platforms across racks. The former is generally called scale-up networking; the latter is scale-out networking. The NVIDIA announcement refers to both types of infrastructure but supplies no performance measurements for the proposed MediaTek implementations.

The platform components named by NVIDIA are intended to address different parts of that integration problem:

  • Chiplets can combine separately designed silicon components in one package.
  • NVLink-C2C is identified as a connectivity technology for linking components.
  • NVHBM is described as supporting customised memory capabilities. HBM, or high-bandwidth memory, is commonly used with accelerators where moving data quickly is important.
  • Rack-scale integration connects the custom accelerator platform to larger NVIDIA-based AI systems.

This model could allow a customer to differentiate the compute portion of an accelerator while relying on a prebuilt surrounding platform for connectivity, memory, packaging and system integration. If delivered as described, that could reduce the engineering burden of fitting a custom accelerator into NVIDIA-linked infrastructure.

However, the announcement provides no independent evidence showing how much development time, cost or performance could change. Terms such as “prevalidated”, “prequalified” and “system-prevalidated” are company descriptions in the supplied announcement, not independently documented qualification results.

The collaboration beyond cloud AI

The companies also said they will continue joint work on local AI computing across multiple generations of NVIDIA RTX Spark and DGX Spark PC chips. The stated direction combines NVIDIA GPUs with MediaTek SoCs.

A system-on-chip, or SoC, integrates several computing and connectivity functions on a single semiconductor package or die. This can reduce the number of board-level components and support power-efficient designs, which is relevant for PCs and other devices operating under limits on size, heat and energy use.

MediaTek previously collaborated with NVIDIA on the GB10 Grace Blackwell Superchip used in NVIDIA DGX Spark. NVIDIA describes the GB10 as combining a Blackwell GPU and Grace CPU connected by NVLink-C2C. The new announcement says the companies plan to extend this work to future generations of RTX Spark and DGX Spark products.

The announcement also covers automotive systems. NVIDIA and MediaTek say they are continuing work on multiple generations of platforms for AI-powered, software-defined vehicles. MediaTek’s Dimensity Auto platforms integrate NVIDIA technologies for AI and NVIDIA RTX graphics in vehicle cockpits, and can work alongside NVIDIA DRIVE AGX.

For vehicle developers, the stated objective is a platform combining MediaTek vehicle SoCs with NVIDIA’s AI, graphics and vehicle-computing technologies. The announcement does not identify specific future vehicle products, automakers, launch dates, prices or regional availability.

Sources