Summary
Google has added TPU 8tx, aimed at confidential inference, and TPU 8i Max, designed for memory-intensive AI workloads, to its eighth-generation TPU systems. The company says the two configurations address sensitive data processing and large-context workloads.
Google announced two additions to its eighth-generation TPU portfolio on November 9, 2026: TPU 8tx, designed for confidential inference, and TPU 8i Max, built for AI workloads that need large memory capacity and bandwidth. The company says the systems target sensitive enterprise workloads and very large context windows, respectively.
Google describes these as new systems built around its TPU silicon, rather than simply two entirely new chips. The distinction matters: a system combines processing hardware with elements such as networking, memory and packaging. The new configurations adapt existing eighth-generation designs to particular workload needs.
TPU 8tx targets sensitive data processing
Data is commonly encrypted when stored or transferred, but must be available to a computer during processing. Google says TPU 8tx is designed to protect and isolate sensitive data and model weights at the hardware level even while they are in use. That capability is intended for organisations handling proprietary models or sensitive information, including regulated enterprises and government customers.
The system uses the same silicon as TPU 8t and is paired with 5th Generation AMD EPYC CPU hosts. It also uses Google’s Boardfly network, which the company describes as a low-latency network designed for real-time reasoning. Google says TPU 8tx can deliver up to 2x lower latency than TPU 8t, with a near-zero performance penalty.
The configuration is intended to combine inference with some model development work. Google says teams can use it to fine-tune models on private data, distil larger models into smaller ones, and train agents through reinforcement learning without moving sensitive data between separate clusters. These are company-described capabilities and use cases for the system.
TPU 8i Max is designed for larger workloads
TPU 8i Max addresses a different constraint: the amount and speed of data available to processors. In AI workloads that use long context windows or coordinate many agents, memory movement can limit how much work processors complete. A context window is the information a model can consider while generating an answer; larger contexts can require more memory to hold and retrieve the relevant information.
Google says TPU 8i Max combines two TPU 8i chips in a single package. Compared with TPU 8i, it provides double the compute, double the SRAM and double the high-bandwidth memory (HBM) bandwidth. SRAM is fast memory located close to processing units, while HBM is high-bandwidth memory used to supply data to accelerators.
The company says the design is intended for massive context windows, including workloads involving million-token contexts. It also says the system fits twice the silicon within the existing rack footprint, increasing compute density per area and per watt. These specifications position 8i Max for workloads where keeping large amounts of model or context data close to the processors is important.
A wider set of systems for different AI tasks
The two additions join TPU 8t, which Google introduced for large-scale training, and TPU 8i, designed for low-latency reasoning. Google presents the four systems as options for different stages of AI work: training, reasoning, confidential computing and large-context processing. The company said this was the first time it had introduced four TPU systems in a single year.
The announcement reflects a shift from treating an accelerator as a chip alone to configuring the surrounding system for specific bottlenecks. For organisations running AI workloads, that means the relevant distinction is not only how much compute a chip offers, but also how its memory, networking and security are arranged. Google’s announcement describes the intended capabilities of these systems; it does not provide a specific customer deployment date or price.